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description the M37736MHLXXXHP is a single-chip microcomputer using the 7700 family core. this single-chip microcomputer has a cpu and a bus interface unit. the cpu is a 16-bit parallel processor that can be an 8-bit parallel processor, and the bus interface unit enhances the memory access efficiency to execute instructions fast. this microcomputer also includes a 32 khz oscillation circuit, in addition to the rom, ram, multiple-function timers, serial i/o, a-d converter, and so on. its strong points are the low power dissipation, the low supply voltage, and the small package. in the M37736MHLXXXHP, as the multiplex method of the external bus, either of 2 types can be selected. features l number of basic instructions .................................................. 103 l memory size rom ................................................. 124 kbytes ram ................................................ 3968 bytes l instruction execution time the fastest instruction at 12 mhz frequency ...................... 333 ns l single power supply ...................................................... 2.7C5.5 v l low power dissipation (at 3 v supply voltage, 12 mhz frequency) ............................................ 9 mw (typ.) l interrupts ............................................................ 19 types, 7 levels l multiple-function 16-bit timer ................................................. 5 + 3 l serial i/o (uart or clock synchronous) ..................................... 3 l 10-bit a-d converter .............................................. 8-channel inputs l 12-bit watchdog timer l programmable input/output, output (ports p0, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10) ............... 84 l clock generating circuit ........................................ 2 circuits built-in l small package ..................... 100-pin plastic molded fine-pitch qfp (100p6q-a;0.5 mm lead pitch) application control devices for general commercial equipment such as office automation, office equipment, personal information equipment, and others. control devices for general industrial equipment such as communication equipment, and others. pin configuration (top view) preliminary notice: this is not a final specification. some parametric limits are subject to change. mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer outline 100p6q-a 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 ? p2 3 /a 19 /a 3 /d 3 ? p2 4 /a 20 /a 4 /d 4 ? p2 5 /a 21 /a 5 /d 5 ? p2 6 /a 22 /a 6 /d 6 ? p2 7 /a 23 /a 7 /d 7 ? p3 0 /r/w/wel ? p3 1 /bhe/weh ? p3 2 /ale ? p3 3 /hlda ? evl0 ? evl1 M37736MHLXXXHP v cc v ss ? e/rde ? x out ? x in ? reset ? bsel ? cnv ss ? byte ? p4 0 /hold ? p4 1 /rdy ? p4 2 / f 1 ? p4 3 ? p4 4 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 p9 1 /clk 2 ? p9 0 /cts 2 ? p8 7 /t x d 1 ? p8 6 /r x d 1 ? p8 5 /clk 1 ? p8 4 /cts 1 /rts 1 ? p8 3 /t x d 0 ? p8 2 /r x d 0 /clks 0 ? p8 1 /clk 0 ? p8 0 /cts 0 /rts 0 /clks 1 ? v cc av cc v ref ? av ss v ss p7 7 /an 7 /x cin ? p7 6 /an 6 /x cout ? p7 5 /an 5 /ad trg ? p7 4 /an 4 ? p7 3 /an 3 ? p7 2 /an 2 ? p7 1 /an 1 ? p7 0 /an 0 ? p6 7 /tb2 in / f sub ? p6 6 /tb1 in ? 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 ? p9 2 /r x d 2 ? p9 3 /t x d 2 ? p9 4 ? p9 5 ? p9 6 ? p9 7 ? p0 0 /a 0 /cs 0 ? p0 1 /a 1 /cs 1 ? p0 2 /a 2 /cs 2 ? p0 3 /a 3 /cs 3 ? p0 4 /a 4 /cs 4 ? p0 5 /a 5 /rsmp ? p0 6 /a 6 /a 16 ? p0 7 /a 7 /a 17 ? p1 0 /a 8 /d 8 ? p1 1 /a 9 /d 9 ? p1 2 /a 10 /d 10 ? p1 3 /a 11 /d 11 ? p1 4 /a 12 /d 12 ? p1 5 /a 13 /d 13 ? p1 6 /a 14 /d 14 ? p1 7 /a 15 /d 15 ? p2 0 /a 16 /a 0 /d 0 ? p2 1 /a 17 /a 1 /d 1 ? p2 2 /a 18 /a 2 /d 2 p6 5 /tb0 in ? p6 4 /int 2 ? p6 3 /int 1 ? p6 2 /int 0 ? p6 1 /ta4 in ? p6 0 /ta4 out ? p5 7 /ta3 in ? p5 6 /ta3 out ? p5 5 /ta2 in ? p5 4 /ta2 out ? p5 3 /ta1 in ? p5 2 /ta1 out ? p5 1 /ta0 in ? p5 0 /ta0 out ? p10 7 /ki 3 ? p10 6 /ki 2 ? p10 5 /ki 1 ? p10 4 /ki 0 ? p10 3 ? p10 2 ? p10 1 ? p10 0 ? p4 7 ? p4 6 ? p4 5 ?
preliminary notice: this is not a final specification. some parametric limits are subject to change. 2 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer M37736MHLXXXHP block diagram ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? clock input x in clock output x out clock generating circuit timer ta4(16) ram 3968 bytes rom 124 kbytes timer ta3(16) timer ta2(16) timer ta1(16) p8(8) input/output port p8 p7(8) input/output port p7 x cin x cout p6(8) input/output port p6 p5(8) input/output port p5 p4(8) input/output port p4 p3(4) input/output port p3 p2(8) input/output port p2 p1(8) input/output port p1 p0(8) input/output port p0 timer ta0(16) watchdog timer timer tb2(16) timer tb1(16) timer tb0(16) uart2(9) uart1(9) uart0(9) a-d converter(10) instruction register(8) data buffer db h (8) data buffer db l (8) processor status register ps(11) direct page register dpr(16) stack pointer s(16) index register y(16) index register x(16) accumulator b(16) arithmetic logic unit(16) accumulator a(16) instruction queue buffer q 0 (8) instruction queue buffer q 1 (8) incrementer(24) program address register pa(24) data address register da(24) instruction queue buffer q 2 (8) program counter pc(16) incrementer/decrementer(24) program bank register pg(8) data bank register dt((8) input buffer register ib(16) address bus data bus(even) data bus(odd) x cin x cout enable output e reset input reset (0v) v ss (0v) av ss cnv ss av cc reference voltage input v ref bus method selection input bsel external data bus width selection input byte v cc ? ? ? ? ? ? ? ? ? p9(8) output port p9 ? ? ? ? ? ? ? ? ? p10(8) input/output port p10
3 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. parameter functions number of basic instructions 103 instruction execution time 333 ns (the fastest instruction at external clock 12 mhz frequency) rom 124 kbytes ram 3968 bytes p0 C p2, p4 C p8, p10 8-bit 5 9 p3 4-bit 5 1 output port p9 8-bit 5 1 ta0, ta1, ta2, ta3, ta4 16-bit 5 5 tb0, tb1, tb2 16-bit 5 3 serial i/o (uart or clock synchronous serial i/o) 5 3 a-d converter 10-bit 5 1 (8 channels) watchdog timer 12-bit 5 1 3 external types, 16 internal types each interrupt can be set to the priority level (0 C 7.) 2 circuits built-in (externally connected to a ceramic resonator or a quartz-crystal oscillator) supply voltage 2.7 C 5.5 v 9 mw (at 3 v supply voltage, external clock 12 mhz frequency) 22.5 mw (at 5 v supply voltage, external clock 12 mhz frequency) input/output voltage 5 v output current 5 ma external bus mode a; maximum 16 mbytes, external bus mode b; maximum 1 mbytes operating temperature range C40 to 85 c device structure cmos high-performance silicon gate process package 100-pin plastic molded fine-pitch qfp (100p6q-a;0.5 mm lead pitch) functions of M37736MHLXXXHP memory size input/output ports multi-function timers interrupts clock generating circuit power dissipation input/output characteristic memory expansion
preliminary notice: this is not a final specification. some parametric limits are subject to change. 4 mitsubishi micr ocomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer pin name input/output functions vcc, power source apply 2.7 C 5.5 v to vcc and 0 v to vss. vss cnvss cnvss input input this pin controls the processor mode. connect to vss for the single-chip mode and the memory expansion mode, and to vcc for the microprocessor mode. _____ reset reset input input when l level is applied to this pin, the microcomputer ent ers the reset state. these are pins of main-clock generating circuit. connect a c eramic resonator or a quartz- crystal oscillator between x in and x out . when an external clock is used, the clock source should be connected to the x in pin, and the x out pin should be left open. _ e enable output output this pin functions as the enable signal output pin which ind icates the access status in the internal bus. in the external bus mode b and the memory expansion mod e or the microprocessor mode, ___ this pin output signal rde . byte external data input in the memory expansion mode or the microprocessor mode, thi s pin determines whether the bus width external data bus has an 8-bit width or a 16-bit width. the data bus has a 16-bit width when l selection input signal is input and an 8-bit width when h signal is input. bsel bus method input in the memory expansion mode or the microprocessor mode, thi s pin determines the external bus select input mode. the bus mode becomes the external bus mode a when h signal is input, and the external bus mode b when l signal is input. avcc, analog power power source input pin for the a-d converter. externally con nect avcc to vcc and avss to vss. avss source input v ref reference input this is reference voltage input pin for the a-d converter. voltage input p0 0 C p0 7 i/o port p0 i/o in the single-chip mode, port p0 becomes an 8-bit i/o port. an i/o direction register is available so that each pin can be programmed for input or output. these p orts are in the input mode when reset. in the memory expansion mode or the microprocessor mode, the se pins output address (a 0 C a 7 ) ___ ___ ____ at the external bus mode a, and these pins output signals cs 0 C cs 4 and rsmp , and addresses (a 16 , a 17 ) at the external bus mode b. p1 0 C p1 7 i/o port p1 i/o in the single-chip mode, these pins have the same functions as port p0. when the byte pin is set to l in the memory expansion mode or the microprocessor mo de and external data bus has a 16-bit width, high-order data (d 8 C d 15 ) is input/output or an address (a 8 C a 15 ) is output. when the byte pin is h and an external data bus has an 8-bit wi dth, only address (a 8 C a 15 ) is output. p2 0 C p2 7 i/o port p2 i/o in the single-chip mode, these pins have the same functions as port p0. in the memory expansion mode or the microprocessor mode, low-order data (d 0 C d 7 ) is input/output or an address is output. when using the external bus mode a, the address i s a 16 C a 23 . when using the external bus mode b, the address is a 0 C a 7 . i/o port p3 i/o in the single-chip mode, these pins have the same function a s port p0. in the memory expansion _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ mode or the microprocessor mode, r/ w , bhe , ale, and hlda signals are output at the external ________ ____________ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ bus mode a, and wel , weh , ale, and hlda signals are output at the external bus mode b. p4 0 C p4 7 i/o port p4 i/o in the single-chip mode, these pins have the same functions as port p0. in the memory expansion ____ ___ mode or the microprocessor mode, p4 0 , p4 1 , and p4 2 become hold and rdy input pins, and a clock 1 output pin, respectively. functions of the other pins are th e same as in the single-chip mode. however, in the memory expansion mode, p4 2 can be selected as an i/o port. p5 0 C p5 7 i/o port p5 i/o in addition to having the same functions as port p0 in the s ingle-chip mode, these pins also function as i/o pins for timers a0 to a3. p6 0 C p6 7 i/o port p6 i/o in addition to having the same functions as port p0 in the s ingle-chip mode, these pins also ___ ___ function as i/o pins for timer a4, input pins for external i nterrupt input ( int 0 C int 2 ) and input pins for timers b0 to b2. p6 7 also functions as sub-clock sub output pin. p7 0 C p7 7 i/o port p7 i/o in addition to having the same functions as port p0 in the s ingle-chip mode, these pins function as input pins for a-d converter. additionally, p7 6 and p7 7 have the function as the output pin (x cout ) and the input pin (x cin ) of the sub-clock (32 khz) oscillation circuit, respectivel y. when p7 6 and p7 7 are used as the x cout and x cin pins, connect a resonator or an oscillator between the both. p8 0 C p8 7 i/o port p8 i/o in addition to having the same functions as port p0 in the s ingle-chip mode, these pins also function as i/o pins for uart 0 and uart 1. p9 0 C p9 7 output port p9 output port p9 is an 8-bit i/o port. these ports are floating when reset. when writing to the port latch, these ports become the output mode. p9 0 C p9 3 also function as i/o port for uart 2. p10 0 C p10 7 i/o port p10 i/o in addition to having the same functions as port p0 in the s ingle-chip mode. p10 4 C p10 7 also __ __ function as input pins for key input interrupt input ( kl 0 C kl 3 ). evl0, evl1 output these pins should be left open. pin description x in clock input input x out clock output output p3 0 C p3 3
5 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. basic function blocks the M37736MHLXXXHP has the same functions as the m37736mhbxxxgp except for the package and the reset circuit. refer to the section on the m37736mhbxxxgp. reset circuit _____ the microcomputer is released from the reset state when the reset pin is returned to h level after holding it at l level with the power source voltage at 2.7 C 5.5 v. program execution starts at the address formed by setting address a 23 C a 16 to 00 16 , a 15 C a 8 to the contents of address ffff 16 , and a 7 C a 0 to the contents of address fffe 16 . figure 1 shows an example of a reset circuit. when the stabilized clock is input from the external to the main-clock oscillation circuit, the reset input voltage must be 0.55 v or less when the power source voltage reaches 2.7 v. when a resonator/oscillator is connected to the main-clock oscillation circuit, change the reset input voltage from l to h after the main-clock oscillation is fully stabilized. the status of the internal registers during reset is the same as the m37736mhbxxxgps. fig. 1 example of a reset circuit addressing modes the M37736MHLXXXHP has 28 powerful addressing modes. refer to the 7700 family software manual for the details. machine instruction list the M37736MHLXXXHP has 103 machine instructions. refer to the 7700 family software manual for the details. data required for mask rom ordering please send the following data for mask orders. (1) M37736MHLXXXHP mask rom order confirmation form (2) 100p6q mark specification form (100p6d mark specification form is substituted.) (3) rom data (eprom 3 sets) v cc reset reset v cc 0v 0v 2.7v 0.55v power on note. in this case, stabilized clock is input from the external to the main-clock oscillation circuit. perform careful evalvation at the system design level before using.
preliminary notice: this is not a final specification. some parametric limits are subject to change. 6 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer limits min. typ. max. f(x in ) : operating 2.7 5.5 f(x in ) : stopped, f(x cin ) = 32.768 khz 2.7 5.5 avcc analog power source voltage vcc v vss power source voltage 0v avss analog power source voltage 0 v high-level input voltage p0 0 C p0 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , _____ p7 0 C p7 7 , p8 0 C p8 7 , p9 0 C p9 2 , p10 0 C p10 7 , x in , reset , cnvss, byte, bsel, x cin (note 3) high-level input voltage p1 0 C p1 7 , p2 0 C p2 7 (in single-chip mode) high-level input voltage p1 0 C p1 7 , p2 0 C p2 7 (in memory expansion mode and microprocessor mode) low-level input voltage p0 0 C p0 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , _____ p7 0 C p7 7 , p8 0 C p8 7 , p9 0 C p9 2 , p10 0 C p10 7 , x in , reset , cnvss, byte, bsel, x cin (note 3) low-level input voltage p1 0 C p1 7 , p2 0 C p2 7 (in single-chip mode) low-level input voltage p1 0 C p1 7 , p2 0 C p2 7 (in memory expansion mode and microprocessor mode) high-level peak output current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 , p9 0 C p9 7 , p10 0 C p10 7 high-level average output current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 , p9 0 C p9 7 , p10 0 C p10 7 low-level peak output current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 3 , p5 4 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 , p9 0 C p9 7 , p10 4 C p10 7 low-level peak output current p4 4 C p4 7 , p10 0 C p10 3 low-level average output current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 3 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 , p9 0 C p9 7 , p10 4 C p10 7 i ol(avg) low-level average output current p4 4 C p4 7 , p10 0 C p10 3 12 ma f(x in ) main-clock oscillation frequency (note 4) 12 mhz f(x cin) sub-clock oscillation frequency 32.768 50 khz symbol parameter conditions ratings unit vcc power source voltage C0.3 to +7 v avcc analog power source voltage C0.3 to +7 v v i _____ input voltage reset , cnvss, byte C0.3 to +12 v input voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3, p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 , p9 0 C p9 2 , p10 0 C p10 7 , v ref , x in , bsel output voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3, p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7, _ p9 0 C p9 7 , p10 0 C p10 7 , x out , e p d power dissipation ta = 25 c 200 mw t opr operating temperature C40 to +85 c t stg storage temperature C65 to +150 c v i v o absolute maximum ratings unit symbol parameter recommended operating conditions (vcc = 2.7 C 5.5 v, ta = C40 to +85 c, unless otherwise noted) v vcc power source voltage C0.3 to vcc + 0.3 v C0.3 to vcc + 0.3 v 0.8 vcc 0.8 vcc 0.5 vcc 0 0 0 vcc vcc vcc 0.2vcc 0.2vcc 0.16vcc C10 C5 10 16 5 notes 1. average output current is the average value of a 100 ms interval. 2. the sum of i ol(peak) for ports p0, p1, p2, p3, p8, and p9 must be 80 ma or less, the sum of i oh(peak) for ports p0, p1, p2, p3, p8, and p9 must be 80 ma or less, the sum of i ol(peak) for ports p4, p5, p6, p7, and p10 must be 100 ma or less, and the sum of i oh(peak) for ports p4, p5, p6, p7, and p10 must be 80 ma or less. 3. limits v ih and v il for x cin are applied when the sub clock external input selection bit = 1. 4. the maximum value of f(x in ) = 6 mhz when the main clock division selection bit = 1. v v v v v v ma ma ma ma ma v ih v ih v ih v il v il v il i oh(peak) i oh(avg) i ol(peak) i ol(peak) i ol(avg)
7 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. v v cc = 5 v, i oh = C10 ma v cc = 3 v, i oh = C1 ma v cc = 5 v, i oh = C400 a v cc = 5 v, i oh = C10 ma v cc = 5 v, i oh = C400 a v cc = 3 v, i oh = C1 ma v cc = 5 v, i oh = C10 ma v cc = 5 v, i oh = C400 a v cc = 3 v, i oh = C1 ma v cc = 5 v, i ol = 10 ma v cc = 3 v, i ol = 1 ma v cc = 5 v, i ol = 16 ma v cc = 3 v, i ol = 10 ma v cc = 5 v, i ol = 2 ma v cc = 5 v, i ol = 10 ma v cc = 5 v, i ol = 2 ma v cc = 3 v, i ol = 1 ma v cc = 5 v, i ol = 10 ma v cc = 5 v, i ol = 2 ma v cc = 3 v, i ol = 1 ma v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v v cc = 5 v, v i = 5 v v cc = 3 v, v i = 3 v v cc = 5 v, v i = 0 v v cc = 3 v, v i = 0 v v i = 0 v, without a pull-up transistor v i = 0 v, with a pull-up transistor when clock is stopped. unit electrical characteristics (vcc = 5 v, vss = 0 v, ta = C40 to +85 c, f(x in ) = 12 mhz, unless otherwise noted) symbol parameter test conditions 3 2.5 4.7 v v oh v oh C0.5 C0.18 v oh 3.1 4.8 2.6 3.4 4.8 2.6 v oh v ol v v v v 2 0.5 1.8 1.5 v v ol 0.45 1.9 0.43 0.4 1.6 0.4 0.4 v v v 0.4 0.1 0.2 0.1 0.1 0.06 0.1 0.06 1 0.7 0.5 0.4 0.4 0.26 0.4 0.26 v cc = 5 v v cc = 3 v v cc = 5 v v cc = 3 v C5 C4 C1.0 C0.35 v v v v a a a ma v ol v ol v ol v t+ C v tC v t+ C v tC v t+ C v tC v t+ C v tC i ih i il i il v ram ram hold voltage limits min. typ. max. high-level output voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 , p9 0 C p9 7 , p10 0 C p10 7 high-level output voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 3 high-level output voltage p3 0 C p3 2 _ high-level output voltage e low-level output voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 3 , p4 0 C p4 3 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 , p9 0 C p9 7 , p10 4 C p10 7 low-level output voltage p4 4 C p4 7 , p10 0 C p10 3 low-level output voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 3 low-level output voltage p3 0 C p3 2 _ low-level output voltage e ____ ___ hysteresis hold , rdy , ta0 in C ta4 in , tb0 in C tb2 in , ___ ___ ____ ____ ____ ____ int 0 C int 2 , ad trg , cts 0 , cts 1 , cts 2 , clk 0 , __ __ clk 1 , clk 2 , ki 0 C ki 3 _____ hysteresis reset hysteresis x in hysteresis x cin (when external clock is input) high-level input current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 7 , p6 0 C p6 7 , p7 0 C p7 7 , _____ p8 0 C p8 7 , p9 0 C p9 2 , p10 0 C p10 7, x in , reset , cnvss, byte, bsel low-level input current p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 3 , p4 0 C p4 7 , p5 0 C p5 3 , p6 0 , p6 1 , p6 5 C p6 7 , p7 0 C p7 7 , p8 0 C p8 7 , p9 0 C p9 2 , p10 0 C p10 3, _____ x in , reset , cnvss, byte, bsel low-level input current p6 2 C p6 4 , p10 4 C p10 7 5 C5 4 C4 C0.25 C0.08 2
preliminary notice: this is not a final specification. some parametric limits are subject to change. 8 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer v cc = 5 v, f(x in ) = 12 mhz (square waveform), (f(f 2 ) = 6 mhz), f(x cin ) = 32.768 khz, in operating (note 1) v cc = 3 v, f(x in ) = 12 mhz (square waveform), (f(f 2 ) = 6 mhz), f(x cin ) = 32.768 khz, in operating (note 1) v cc = 3 v, f(x in ) = 12 mhz (square waveform), (f(f 2 ) = 0.75 mhz), f(x cin ) : stopped, in operating v cc = 3 v, f(x in ) = 12 mhz (square waveform), f(x cin ) = 32.768 khz, when a wit instruction is executed (note 2) v cc = 3 v, f(x in ) : stopped, f(x cin ) = 32.768 khz, in operating (note 3) v cc = 3 v, f(x in ) : stopped, f(x cin ) = 32.768 khz, when a wit instruction is executed (note 4) ta = 25 c, when clock is stopped ta = 85 c, when clock is stopped ma ma ma a a a a a max. 9 6 0.8 12 60 6 1 20 limits typ. 4.5 3 0.4 6 30 3 unit min. test conditions symbol parameter electrical characteristics (vcc = 5 v, vss = 0 v, ta = C40 to +85 c, unless otherwise noted) when single-chip mode, output pins are open, and other pins are v ss . power source current i cc limits min. typ. max. resolution v ref = v cc 10 bits absolute accuracy v ref = v cc 3 lsb r ladder ladder resistance v ref = v cc 10 25 k w t conv conversion time 19.6 s v ref reference voltage 2.7 v cc v v ia analog input voltage 0 v ref v symbol parameter test conditions unit aCd converter characteristics (v cc = av cc = 5 v, v ss = av ss = 0 v, ta = C40 to +85 c, f(x in ) = 12 mhz, unless otherwise noted (note)) note. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mhz. notes 1. this applies when the main clock external input selection bit = 1, the main clock division selection bit = 0, and the signal output stop bit = 1. 2. this applies when the main clock external input selection bit = 1 and the system clock stop bit at wait state = 1. 3. this applies when cpu and the clock timer are operating with the sub clock (32.768 khz) selected as the system clock. 4. this applies when the x cout drivability selection bit = 0 and the system clock stop bit at wait state = 1.
9 mitsubishi micr ocomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. limits min. max. t su(p0d C e) port p0 input setup time 200 ns t su(p1d C e) port p1 input setup time 200 ns t su(p2d C e) port p2 input setup time 200 ns t su(p3d C e) port p3 input setup time 200 ns t su(p4d C e) port p4 input setup time 200 ns t su(p5d C e) port p5 input setup time 200 ns t su(p6d C e) port p6 input setup time 200 ns t su(p7d C e) port p7 input setup time 200 ns t su(p8d C e) port p8 input setup time 200 ns t su(p10d C e) port p10 input setup time 200 ns t h(e C p0d) port p0 input hold time 0n s t h(e C p1d) port p1 input hold time 0n s t h(e C p2d) port p2 input hold time 0n s t h(e C p3d) port p3 input hold time 0n s t h(e C p4d) port p4 input hold time 0n s t h(e C p5d) port p5 input hold time 0n s t h(e C p6d) port p6 input hold time 0n s t h(e C p7d) port p7 input hold time 0n s t h(e C p8d) port p8 input hold time 0n s t h(e C p10d) port p10 input hold time 0n s limits min. max. t c external clock input cycle time (note 3) 83 ns t w(h) external clock input high-level pulse width (note 4) 33 ns t w(l) external clock input low-level pulse width (note 4) 33 ns t r external clock rise time 15 ns t f external clock fall time 15 ns limits min. max. t su(d C e) data input setup time (external bus mode a) 50 ns t su(d C rde) data input setup time (external bus mode b) 5 0 ns t su(rdy C 1) ___ rdy input setup time 80 ns t su(hold e 1) ____ hold input setup time 80 ns t h(e e d) data input hold time (external bus mode a) 0 ns t h(rde e d) data input hold time (external bus mode b) 0 ns t h( 1 e rdy) ___ rdy input hold time 0n s t h( 1 e hold) ____ hold input hold time 0n s timing requirements (v cc = 2.7 C 5.5 v, v ss = 0 v, ta = C 40 to +85 c, f(x in ) = 12 mhz, unless otherwise noted (note 1)) notes 1. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mh z . 2. input signal s rise/fall time must be 100 ns or less, unles s otherwise noted. external clock input unit symbol parameter notes 3. when the main clock division selection bit = 1 , the minimu m value of t c = 166 ns. 4. when the main clock division selection bit = 1 , values of t w(h) / t c and t w(l) / t c must be set to values from 0.45 through 0.55. unit symbol parameter memory expansion mode and microprocessor mode single-chip mode unit symbol parameter
preliminary notice: this is not a final specification. some parametric limits are subject to change. 10 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer limits min. max. t c(ta) tai in input cycle time 250 ns t w(tah) tai in input high-level pulse width 125 ns t w(tal) tai in input low-level pulse width 125 ns unit symbol parameter timer a input (count input in event counter mode) limits min. max. t c(ta) tai in input cycle time (note) 666 ns t w(tah) tai in input high-level pulse width (note) 333 ns t w(tal) tai in input low-level pulse width (note) 333 ns unit symbol parameter timer a input (gating input in timer mode) limits min. max. t c(ta) tai in input cycle time (note) 666 ns t w(tah) tai in input high-level pulse width 166 ns t w(tal) tai in input low-level pulse width 166 ns unit symbol parameter timer a input (external trigger input in one-shot pulse mode) limits min. max. t w(tah) tai in input high-level pulse width 166 ns t w(tal) tai in input low-level pulse width 166 ns unit symbol parameter timer a input (external trigger input in pulse width modulation mode) limits min. max. t c(up) tai out input cycle time 3333 ns t w(uph) tai out input high-level pulse width 1666 ns t w(upl) tai out input low-level pulse width 1666 ns t su(upCt in ) tai out input setup time 666 ns t h(t in Cup) tai out input hold time 666 ns unit symbol parameter timer a input (up-down input in event counter mode) limits min. max. t c(ta) taj in input cycle time 2000 ns t su(taj in Ctaj out ) taj in input setup time 500 ns t su(taj out Ctaj in ) taj out input setup time 500 ns unit symbol parameter timer a input (two-phase pulse input in event counter mode) note. limits change depending on f(x in ). refer to data formulas. note. limits change depending on f(x in ). refer to data formulas.
11 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. limits min. max. t c(ck) clk i input cycle time 333 ns t w(ckh) clk i input high-level pulse width 166 ns t w(ckl) clk i input low-level pulse width 166 ns t d(cCq) t x d i output delay time 100 ns t h(cCq) t x d i hold time 0ns t su(dCc) r x d i input setup time 65 ns t h(cCd) r x d i input hold time 75 ns limits min. max. t c(tb) tbi in input cycle time (one edge count) 250 ns t w(tbh) tbi in input high-level pulse width (one edge count) 125 ns t w(tbl) tbi in input low-level pulse width (one edge count) 125 ns t c(tb) tbi in input cycle time (both edges count) 500 ns t w(tbh) tbi in input high-level pulse width (both edges count) 250 ns t w(tbl) tbi in input low-level pulse width (both edges count) 250 ns unit symbol parameter timer b input (count input in event counter mode) limits min. max. t c(tb) tbi in input cycle time (note) 666 ns t w(tbh) tbi in input high-level pulse width (note) 333 ns t w(tbl) tbi in input low-level pulse width (note) 333 ns unit symbol parameter timer b input (pulse period measurement mode) limits min. max. t c(tb) tbi in input cycle time (note) 666 ns t w(tbh) tbi in input high-level pulse width (note) 333 ns t w(tbl) tbi in input low-level pulse width (note) 333 ns unit symbol parameter timer b input (pulse width measurement mode) unit symbol parameter a-d trigger input unit symbol parameter serial i/o unit symbol parameter ____ ___ external interrupt int i input, key input interrupt ki i input limits min. max. t w(inh) ___ int i input high-level pulse width 250 ns t w(inl) ___ int i input low-level pulse width 250 ns t w(kil) __ ki i input low-level pulse width 250 ns limits min. max. t c(ad) ____ ad trg input cycle time (minimum allowable trigger) 1333 ns t w(adl) ____ ad trg input low-level pulse width 166 ns note. limits change depending on f(x in ). refer to data formulas. note. limits change depending on f(x in ). refer to data formulas.
preliminary notice: this is not a final specification. some parametric limits are subject to change. 12 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer data formulas timer a input (gating input in timer mode) 8 5 10 9 2 ? f(f 2 ) 4 10 9 2 ? f(f 2 ) 4 5 10 9 2 ? f(f 2 ) limits min. max. symbol parameter unit t c(ta) tai in input cycle time t w(tah) tai in input high-level pulse width t w ( tal ) tai in input low-level pulse width ns ns ns 8 10 9 2 f(f 2 ) timer a input (external trigger input in one-shot pulse mode) limits min. max. symbol parameter unit t c(ta) tai in input cycle time ns timer b input (in pulse period measurement mode or pulse width measurement mode) limits min. max. symbol parameter unit ns ns ns t c(tb) tbi in input cycle time t w(tbh) tbi in input high-level pulse width t w(tbl) tbi in input low-level pulse width 8 5 10 9 2 ? f(f 2 ) 4 5 10 9 2 ? f(f 2 ) 4 5 10 9 2 ? f(f 2 ) note. f(f 2 ) represents the clock f 2 frequency. for the relation to the main clock and sub clock, refer to table 10 in data sheet m37736mhbxxxgp. 5 5 ?
13 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. switching characteristics (v cc = 2.7 C 5.5 v, v ss = 0 v, ta = C 40 to +85c, f(x in ) = 12 mhz, unless otherwise noted (note)) limits min. max. t d(eCp0q) port p0 data output delay time 300 ns t d(eCp1q) port p1 data output delay time 300 ns t d(eCp2q) port p2 data output delay time 300 ns t d(eCp3q) port p3 data output delay time 300 ns t d(eCp4q) port p4 data output delay time 300 ns t d(eCp5q) port p5 data output delay time 300 ns t d(eCp6q) port p6 data output delay time 300 ns t d(eCp7q) port p7 data output delay time 300 ns t d(eCp8q) port p8 data output delay time 300 ns t d(eCp9q) port p9 data output delay time 300 ns t d(eCp10q) port p10 data output delay time 300 ns unit symbol parameter test conditions fig. 2 note. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mhz. single-chip mode fig. 2 measuring circuit for ports p0 C p10 and 1 p 0 p 1 p 2 p 3 p 4 p 5 p 6 p 7 p 8 p 9 p 10 1 e 50 pf
preliminary notice: this is not a final specification. some parametric limits are subject to change. 14 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer symbol parameter t d(eCdq) t h(eCdq) address output delay time address output delay time address hold time ale pulse width address output setup time address hold time ale output delay time [external bus mode a] memory expansion mode and microprocessor mode (v cc = 2.7 C 5.5 v, v ss = 0 v, ta = C40 to +85c, f(x in ) = 12 mhz (note 1), unless otherwise noted) limits wait mode min. max. test conditions unit 90 10 20 182 20 162 40 40 123 10 93 9 40 4 40 40 131 298 53 20 182 20 182 33 33 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns t d(anCe) t d(aCe) t d(aleCe) t h(eCan) t w(ale) t su(aCale) t h(aleCa) t w(el) data output delay time data hold time _ e pulse width floating start delay time floating release delay time ___ bhe output delay time _ r/ w output delay time ___ bhe hold time _ r/ w hold time no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 fig. 2 (note 2) 1 output delay time t pxz(eCdz) t pzx(eCdz) t d(bheCe) t d(r/wCe) t h(eCbhe) t h(eCr/w) t d(eC 1 ) t d( 1 Chlda) ____ hlda output delay time 030 120 notes 1. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mhz. 2. no wait : wait bit = 1. wait 1 : the external memory area is accessed with wait bit = 0 and wait selection bit = 1. wait 0 : the external memory area is accessed with wait bit = 0 and wait selection bit = 0.
15 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. address output delay time address output delay time address hold time ale pulse width address output setup time address hold time ale output delay time data output delay time data hold time _ e pulse width floating start delay time floating release delay time no wait wait 1 wait 0 [external bus mode a] memory expansion mode and microprocessor mode bus timing data formulas (v cc = 2.7 C 5.5 v, v ss = 0 v, ta = C40 to + 85 c, f(x in ) = 12 mhz (max., note), unless otherwise noted) 90 10 1 5 10 9 2 f(f 2 ) 3 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 3 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 2 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 2 5 10 9 2 f(f 2 ) ns ns ns ns ns ns ns ns ns ns no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 1 5 10 9 2 f(f 2 ) ns ns ns ns ns ns 9 4 1 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 2 5 10 9 2 f(f 2 ) 4 5 10 9 2 f(f 2 ) ns ns 1 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 3 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 3 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) 1 5 10 9 2 f(f 2 ) C 63 C 68 C 63 C 88 C 43 C 43 C 43 C 73 C 73 C 43 C 43 C 43 C 35 C 35 C 30 C 63 C 68 C 63 C 68 C 50 C 50 unit symbol parameter limits wait mode min. max. t d(anCe) t d(aCe) t h(eCan) t w(ale) t su(aCale) t h(aleCa) t d(aleCe) t d(eCdq) t h(eCdq) t w(el) t pxz(eCdz) t pzx(eCdz) no wait wait 1 wait 0 ___ bhe output delay time _ r/ w output delay time t d(bheCe) t d(r/wCe) t h(eCbhe) t h(eCr/w) t d(eC 1) 1 output delay time _ r/ w hold time ___ bhe hold time 0 30 ns ns ns ns ns ns ns ns notes 1. this applies when the main-clock division selection bit = 0. 2. f(f 2 ) represents the clock f 2 frequency. for the relation to the main clock and sub clock, refer to table 10 in data sheet m37736mhbxxxgp.
preliminary notice: this is not a final specification. some parametric limits are subject to change. 16 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 chip-select output delay time chip-select hold time address output delay time address output delay time address hold time ale pulse width address output setup time address hold time ale output delay time data output delay time data hold time ___ ___ wel / weh pulse width floating start delay time floating release delay time ___ rde pulse width ____ rsmp output delay time ____ rsmp hold time 1 output delay time ____ hlda output delay time limits wait mode min. max. [external bus mode b] memory expansion mode and microprocessor mode (v cc = 2.7 C 5.5 v, v ss = 0 v, ta = C40 to +85 c, f(x in ) = 12 mhz, unless otherwise noted (note 1)) symbol parameter test conditions t d(csCwe) t d(csCrde) t h(weCcs) t h(rdeCcs) t d(anCwe) t d(anCrde) t d(aCwe) t d(aCrde) t h(weCan) t h(rdeCan) t w(ale) t su(aCale) t h(aleCa) t d(aleCwe) t d(aleCrde) t d(weCdq) t h(weCdq) t w(we) t pxz(rdeCdz) t pzx(rdeCdz) t w(rde) t d(rsmpCwe) t d(rsmpCrde) t h( 1 Crsmp) t d(weC 1 ) t d(rdeC 1 ) t d( 1 Chlda) notes 1. this applies when the main clock division selection bit = 0 and f(f 2 ) = 6 mhz. 2. no wait : wait bit = 1. wait 1 : the external memory area is accessed with wait bit = 0 and wait selection bit = 1. wait 0 : the external memory area is accessed with wait bit = 0 and wait selection bit = 0. unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 90 10 30 120 20 182 4 20 182 20 162 40 40 123 10 93 9 40 4 40 40 131 298 53 128 295 25 0 0 fig. 2 (note 2)
17 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. [external bus mode b] bus timing data formulas (v cc = 2.7 C 5.5v, v ss = 0 v, ta = C40 to +85 c, f(x in ) = 12 mhz (max.), unless otherwise noted (note1)) 90 10 30 limits wait mode min. max. symbol parameter unit 1 5 10 9 2 ? f(f 2 ) 3 5 10 9 2 ? f(f 2 ) ns ns no wait wait 1 wait 0 t d(csCwe) t d(csCrde) t h(weCcs) t h(rdeCcs) t d(anCwe) t d(anCrde) t d(aCwe) t d(aCrde) t h(weCan) t h(rdeCan) t w(ale) t su(aCale) t h(aleCa) t d(aleCwe) t d(aleCrde) t d(weCdq) t h(weCdq) t w(we) t pxz(rdeCdz) t pzx(rdeCdz) t w(rde) t d(rsmpCwe) t d(rsmpCrde) t h( 1 Crsmp) t d(weC 1 ) t d(rdeC 1 ) ns 4 1 5 10 9 2 ? f(f 2 ) 3 5 10 9 2 ? f(f 2 ) 1 5 10 9 2 ? f(f 2 ) 3 5 10 9 2 ? f(f 2 ) 1 5 10 9 2 ? f(f 2 ) 1 5 10 9 2 ? f(f 2 ) 2 5 10 9 2 ? f(f 2 ) 1 5 10 9 2 ? f(f 2 ) 2 5 10 9 2 ? f(f 2 ) ns ns ns ns ns ns ns ns ns ns no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 no wait wait 1 wait 0 1 5 10 9 2 ? f(f 2 ) ns ns ns ns ns ns 9 4 1 5 10 9 2 ? f(f 2 ) 1 5 10 9 2 ? f(f 2 ) 2 5 10 9 2 ? f(f 2 ) 4 5 10 9 2 ? f(f 2 ) ns ns 1 5 10 9 2 ? f(f 2 ) 2 5 10 9 2 ? f(f 2 ) 4 5 10 9 2 ? f(f 2 ) 1 5 10 9 2 ? f(f 2 ) ns ns ns ns ns ns 0 0 chip-select output delay time chip-select hold time address output delay time address output delay time address hold time ale pulse width address output setup time address hold time ale output delay time data output delay time data hold time ___ ___ wel / weh pulse width floating start delay time floating release delay time ___ rde pulse width ____ rsmp output delay time ____ rsmp hold time 1 output delay time C 63 C 68 C 63 C 88 C 43 C 43 C 43 C 73 C 73 C 43 C 43 C 43 C 35 C 35 C 30 C 38 C 38 C 58 C 63 C 68 notes 1. this applies when the main clock division selection bit = 0. 2. f(f 2 ) represents the clock f 2 frequency. for the relation to the main clock and sub clock, refer to table 10 in data sheet m37736mhbxxxgp.
preliminary notice: this is not a final specification. some parametric limits are subject to change. 18 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer timing diagram t w(h) t d(e?iq) port pi output (i = 0 ?10) port pi input (i = 0 ?8, 10) e x in t su(pid?) t h(e?id) t r t f t w(l) t c
19 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. tai in input tai out input t c(ta) t w(tah) t w(tal) t c(up) t w(uph) t w(upl) t h(t in ?p) t su(up? in ) tai out input (up-down input) tai in input (when count by falling) tai in input (when count by rising) in event count mode taj in input taj out input t c(ta) t su(taj in ?aj out ) t su(taj in ?aj out ) t su(taj out ?aj in ) t su(taj out ?aj in ) in event counter mode (when two-phase pulse input is selected) t c(tb) t w(tbh) t w(tbl) tbi in input
preliminary notice: this is not a final specification. some parametric limits are subject to change. 20 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer t c(ad) t w(adl) t c(ck) t w(ckh) t w(ckl) t w(inl) t w(knl) t d(c?) t su(d?) t h(c?) t w(inh) ad trg input clk i txd i rxd i inti input kli input t h(c?)
21 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. memory expansion mode and microprocessor mode (when wait bit = 1) ( when wait bit = 0) (when wait bit = 1 or 0 in common) test conditions ? v cc = 2.7 C 5.5 v ? input timing voltage : v il = 0.2 v cc , v ih = 0.8 v cc ? output timing voltage : v ol = 0.8 v, v oh = 2.0 v 1 rdy input 1 rdy input 1 hold input hlda output t su(rdyC 1 ) t h( 1 Crdy) t su(rdyC 1 ) t h( 1 Crdy) t su(holdC 1 ) t d( 1 Chlda) t h( 1 Chold) t d( 1 Chlda) e or rde, wel, weh e or rde, wel, weh
preliminary notice: this is not a final specification. some parametric limits are subject to change. 22 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer [external bus mode a] 1 t d(e- 1) t d(an-e) t w(ale) t d(ale-e) t su(a-ale) t d(a-e) t d(e-dq) t h(ale-a) t d(bhe-e) t h(e-bhe) t d(r/w-e) t h(e-r/w) t h(e-dq) t pxz(e-dz) t su(d-e) t h(e-d) t pzx(e-dz) t h(e-an) t d(e- 1) t w(el) t w(h) e an ale am/dm dm in bhe r/ w address address address data data address address address t f t r t c t w(l) memory expansion mode and microprocessor mode (no wait : when wait bit = 1) test conditions ? v cc = 2.7 C 5.5 v ? output timing voltage : v ol = 0.8 v, v oh = 2.0 v ? data input dm in : v il = 0.16 v cc , v ih = 0.5 v cc x in
23 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. t w(ale) t c address t w(l) t w(h) t f t r memory expansion mode and microprocessor mode (wait 1 : the external area is accessed when wait bit = 0 and wait selection bit = 1.) address address t d(eC 1 ) t d(anCe) t d(aleCe) t su(aCale) t h(aleCa) t d(aCe) t d(eCdq) t h(eCd) t pzx(eCdz) t h(eCbhe) t su(dCe) test conditions ? vcc = 2.7 C 5.5 v ? output timing voltage : v ol = 0.8 v, v oh = 2.0 v ? data input dm in : v il = 0.16 vcc, v ih = 0.5 vcc data address data t d(eC 1 ) address t pxz(eCdz) t w(el) t h(eCan) t h(eCdq) t h(eCr/w) t d(r/wCe) t d(bheCe) x in e an ale am/dm dm in bhe r /w 1 address [external bus mode a]
preliminary notice: this is not a final specification. some parametric limits are subject to change. 24 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer t h(aleCa) t d(aleCe) t d(eCdq) t w(l) t w(h) t f t c t r memory expansion mode and microprocessor mode (wait 0 : the external memory area is accessed when wait bit = 0 and wait selection bit = 0.) x in 1 address address address address data an ale am/dm dm in r /w t d(anCe) t w(ale) t su(aCale) t h(eCdq) t d(aCe) t pxz(eCdz) t pzx(eCdz) t h(eCd) t su(dCe) address data address test conditions ? vcc = 2.7 C 5.5 v ? output timing voltage : v ol = 0.8 v, v oh = 2.0 v ? data input dm in : v il = 0.16 vcc, v ih = 0.5 vcc t d(eC 1 ) t d(eC 1 ) t d(r/wCe) t h(eCr/w) t w(el) t h(eCan) t d(bheCe) t h(eCbhe) e bhe [external bus mode a]
25 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. t w(we) t h(we Cdq) t w(l) t w(h) t f t r t c memory expansion and m icroprocessor mode (no wait : when wait bit = 1) x in 1 cs 0 C cs 4 an ale am/dm t d(csCwe) t d(csCrde) t h(we Ccs) t h(rdeC cs) address t d(anCwe) t d(anCrde ) t h(rde Can) t w(ale) t d(ale Cwe) address address t su(aCale) t h(ale Ca) t d(aCwe) t d(aCrde) t d(ale Crde) t pxz(rde Cdz) t pzx(rde Cdz) address data address address wel, weh t h(we Can) t d(we Cdq) dm in rde rsmp test conditions ? vcc = 2.7 C 5.5 v ? output timing voltage : v ol = 0.8 v, v oh = 2.0 v ? data input dm in : v il = 0.16 v cc , v ih = 0.5 v cc t su(dCrde) t h(rde Cd) t w(rde) t d(rsmp Cwe) t h( 1 Crsmp) t d(rsmp Crde) data t d(rdeC 1 ) t d(weC 1 ) t d(weC 1 ) t d(rdeC 1 ) [external bus mode b]
preliminary notice: this is not a final specification. some parametric limits are subject to change. 26 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer t w(ale) t d(anCwe) t c am/dm address t d(csCrde) t w(rde) t d(rde- 1 ) t w(l) t w(h) t f t r memory expansion and m icroprocessor mode (wait 1 : the external area is accessed when wait bit = 0 and wait selection bit = 1.) x in 1 address address cs 0 C cs 4 an ale wel, weh dm in rde rsmp t d(weC 1 ) t d(rdeC 1 ) t d(csCwe) t d(aleCwe) t h(rdeCan) t su(aCale) t h(aleCa) t d(aCwe) t d(weCdq) t w(we) t d(aCrde) t pxz(rdeCdz) t pzx(rdeCdz) t h(rdeCcs) t h(rdeCd) t su(dCrde) t d(rsmpCwe) t h( 1 Crsmp) t d(rsmpCrde) test conditions ? vcc = 2.7 C 5.5 v ? output timing voltage : v ol = 0.8 v, v oh = 2.0 v ? data input dm in : v il = 0.16 v cc , v ih = 0.5 v cc data address t h(weCcs) data t d(weC 1 ) t h(we-an) t d(aleCrde) t d(anCrde) t h(weCdq) address [external bus mode b]
27 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer preliminary notice: this is not a final specification. some parametric limits are subject to change. [external bus mode b] t h(aleCa) t d(aleCwe) t d(weCdq) t w(l) t w(h) t f t c t r memory expansion and microprocessor mode (wait 0 : the external memory are is accessed when wait bit = 0 and wait selection bit = 0.) x in 1 address address address address data cs 0 C cs 4 an ale am/dm wel , weh dm in rde rsmp t d(csCwe) t h(weCcs) t d(csCrde) t d(anCwe) t w(ale) t h(weCan) t d(anCrde) t h(rdeCan) t su(aCale) t h(weCdq) t d(aleCrde) t d(aCwe) t w(we) t d(aCrde) t pxz(rdeCdz) t pzx(rdeCdz) t h(rdeCcs) t h(rdeCd) t su(dCrde) t w(rde) t d(rsmpCwe) t h( 1 Crsmp) t d(rsmpCrde) address data address test conditions ? vcc = 2.7 C 5.5 v ? output timing voltage : v ol = 0.8 v, v oh = 2.0 v ? data input dm in : v il = 0.16 v cc , v ih = 0.5 v cc t d(weC 1 ) t d(rdeC 1 ) t d(rdeC 1 ) t d(weC 1 )
preliminary notice: this is not a final specification. some parametric limits are subject to change. 28 mitsubishi microcomputers M37736MHLXXXHP single-chip 16-bit cmos microcomputer package outline ? 1996 mitsubishi electric corp. h-lf456-a ki-9611 printed in japan (rod) new publication, effective nov. 1996. specifications subject to change without notice. notes regarding these materials these materials are intended as a reference to assist our customers in the selection of the mitsubishi semiconductor product best suited to the customers application; they do not convey any license under any intellectual property rights, or any other rights, belonging to mitsubishi electric corporation or a third party. mitsubishi electric corporation assumes no responsibility for any damage, or infringement of any third-partys rights, originating in the use of any product data, diagrams, charts or circuit application examples contained in these materials. all information contained in these materials, including product data, diagrams and charts, represent information on products at the time of publication of these materials, and are subject to change by mitsubishi electric corporation without notice due to product improvements or other reasons. it is therefore recommended that customers contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for the latest product information before purchasing a product listed herein. mitsubishi electric corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. the prior written approval of mitsubishi electric corporation is necessary to reprint or reproduce in whole or in part these materials. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for further details on these materials or the products contained therein. keep safety first in your circuit designs! mitsubishi electric corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap.
rev. rev. no. date 1.00 first edition 970507 2.00 the following are revised: 980731 revision description list M37736MHLXXXHP datasheet (1) revision description page p4 p10 0 C p10 7 p5 right column line 2 p9 memory expan- sion mode and microprocessor mode revised version the M37736MHLXXXHP has 28 powerful addressing modes. refer to the 7700 family software manual for the details. machine instruction list the M37736MHLXXXHP has 103 machine instructions. refer to the 7700 family software manual for the details. previous version revised version previous version the M37736MHLXXXHP has 28 powerful addressing modes. refer to the single-chip 16- bit microcomputers data book for the details of each addressing mode. machine instruction list the M37736MHLXXXHP has 103 machine instructions. refer to the single-chip 16-bit microcomputers data book for details. p10 0 ?p10 7 output port p10 i/o evl0, evl1 output p10 0 ?p10 7 i/o port p10 i/o evl0, evl1 output symbol parameter limits unit min. max. tsu (dCe) data input setup time (external bus mode a) 80 ns tsu (d C rde) data input setup time (external bus mode b) 80 ns symbol parameter limits unit min. max. tsu (dCe) data input setup time (external bus mode a) 50 ns tsu (d C rde) data input setup time (external bus mode b) 50 ns

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